FPGA challenges

Commercial Emulators offer a good End-to-end solution (Software as main strength) for enabling faster models comparable to FPGA speeds (much slower). Emulators often have inbuilt FPGA boards or custom technologies (processors in Cadence Palladium).

FPGA prototyping has following limitations which make these time consuming. Validation teams working with complex designs or unstable designs have to plan several months & resources to make FPGA prototyping systems.
* Place & Routing - for designs spanning multiple FPGAs place & routing is hard
* Number of pins limitations on FPGAs, proprietary solutions offer work around but at expense of speed
* Design readiness - unstable and FPGA unfriendly code in RTL makes bring up extremely hard. Unready design blocks make it very difficult